- Delta-sigma modulation
- Delta-Sigma A/D Converters in Metrological versus Acoustic Applications
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Delta-Sigma A/D Converters in Metrological versus Acoustic Applications
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Gerzberg, J. Lu, and. I , Wu, C. Deng, T. Hou, and B. Shettigar and S. Van-veldhoven and G. The modulator, however, is constructed so as to confine most of the quantization noise to the portion of the spectrum beyond f b , the bandwidth of interest. The digital filter, which is often an n -tap FIR filter, takes the high-speed low-resolution 1-bit modulator output and performs a weighted average of n modulator outputs in a manner dictated by the desired filter characteristics.
Cleaning out all the noise in between f b and F ms -f b makes it possible to reduce the sampling rate to values between F ms and 2 f b without causing any spectra to overlap i. Conceptually, reducing the sample rate, i.
This will bring the spectral images close together, as shown in the figure, which makes the output look like an output from a non oversampled converter. The upper figure shows the output of the modulator after digital filtering but prior to decimation. In real converters, digital filtering and decimation are intimately combined for economy in design and manufacture. For an exact mid-scale dc input level, the output of the mod-ulator is equally likely to be high 1 or low 0 , in other words, the pulse density is 0. If the dc input now moves somewhat off midscale, the modulator output bit pattern will change accordingly.
With effective digital filtering, how can such tones possibly find their way down to baseband?
The answer is via the voltage reference. The digital output is a measure of the ratio of the analog input to the voltage reference. Q: From your explanation it seems that if I apply an ac signal to the converter I do not have to worry about idle tones? A: Well, any ac signal generally has a dc component associated with it, which will have to be represented by the modulator output, so the explanation above still applies.
But if the total dc input offset i. The order of the modulator number of integrations is a measure of how much quantization-noise shaping takes place. Second-order modulators can actually exhibit bit patterns that show up directly in the baseband, even if voltage-reference modulation is not occurring. A: Follow the layout recommendations and bypassing schemes recommended by the manufacturer of the converter.
This applies not only to the voltage reference, but to power supplies and grounding as well. By following those guidelines, the user should be able to reduce the coupling to a negligible level. If, despite the proper design precautions, idle tones are still an issue, there is yet another option that can be pursued. As I explained previously, frequency of the idle tones is a function of the dc input.
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Q: What kind of a load does the input of sigma-delta converters present to my signal conditioning circuitry? A: It depends on the converter. Some sigma-delta converters have a buffer at the input, in which case the input impedance is very high and loading is negligible. But in many cases the input is connected directly to the modulator of the converter. A switched-capacitor sigma-delta modulator will have a simplified equivalent circuit like that shown in the figure. Switches S1 and S2 are controlled by the two phases of a clock to produce alternating closures.
While S1 is closed, the input capacitor samples the input voltage.
When S1 is opened, S2 is closed and the charge on C is dumped into the integrator, thus discharging the capacitor. The input impedance can be computed by calculating the average charge that gets drawn by C from the external circuitry. F sw is directly proportional to the frequency of the clock applied to the converter.
This means that the input impedance is inversely proportional to the converter output sample rate. Sometimes other factors, such as gain, can influence the input impedance. The gain is adjusted using a patented technique that effectively increases Fsw but keeps the converter output sample rate constant and combines the charges from multiple samples. The input impedance of these converters is, for example, 2. These impedances, as noted earlier, represent the average current flow into or out of the converters. Instead, one needs to consider the charging time of the capacitor, C, when S1 is closed.
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For dc applications the driver circuit impedance has only to be low enough so that the capacitor, C, will be charged to a value within the required accuracy before S1 is opened. It actually turns out that as long as the input capacitor charging follows the exponential curve of RC circuits, only the gain accuracy suffers if the input capacitor is switched away too early. The requirement of exponential charging means that an op amp can not drive the switched capacitor input directly.
When a capacitive load is switched onto the output of an op amp, the amplitude will momentarily drop. The op amp will try to correct the situation and in the process hits its slew rate limit non linear response , which can cause the output to ring excessively. The low resistance isolates the amplifier from the switched capacitor, and the capacitance between the input and ground supplies or sinks most of the charge needed to charge up the switched capacitor. This ensures that the op amp will never see the transient nature of the load. This additional filter can also provide antialiasing.
For converters that have a differential input, a differential version of this circuit may be used, as shown in the figure below. Since one input is positive with respect to ground while the other is negative, one input the negative one needs to be supplied negative charge while the other needs to get rid of negative charge when the input capacitors are switched on line. Connecting a capacitor between the two inputs enables most of the charge that is needed by one input to be effectively supplied by the other input.